Bipolar, CMOS and biCMOS transistor current mirror circuits are widely used throughout the electronics industry to source or sink a current that is to be interfaced with one or more signal processing circuits of an integrated circuit architecture. For proper operation, a current interface circuit should ideally be insensitive to changes in its power supply voltage. This has been conventionally accomplished by making the voltage supply rail differential large enough to accommodate powering the integrated circuit of interest, and still leave sufficient voltage `headroom` for the current supply/sink circuit, in the presence of some variation in the power supply's output.
Unfortunately for the circuit designer, the ongoing microminiaturization of electronic products, such as, but not limited to wireless communication circuits, has been and is expected to be continued to be accompanied by a reduction in the size of the power supply. This means that the circuit designer is faced with the task of obtaining the same or even more performance from a circuit that is to be powered by an ever shrinking supply voltage differential (e.g., currently on the order of two volts or less).
As a non-limiting example, in a communication signal processing application employing an IF amplifier circuit having a bipolar transistor configured peak detector input stage, the associated current sink (e.g., an N-channel MOSFET circuit) may forced to operate with an extremely low overhead voltage (dependent upon the IF amplifier's AGC setting), for example, on the order of less than 0.2 V at a low V.sub.CC supply rail value and low temperature, due to relatively large base-emitter voltages required of the peak detector circuit.